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Programmable Single-/Dual-/Triple- Tone Gong
Preliminary Data
SAE 800
Bipolar IC
Features
q q q q q q q q q
Supply voltage range 2.8 V to 18 V Few external components (no electrolytic capacitor) 1 tone, 2 tones, 3 tones programmable Loudness control Typical standby current 1 A Constant current output stage (no oscillation) High-efficiency power stage Short-circuit protection Thermal shutdown
P-DIP-8-4
P-DSO-8-1
Type w SAE 800 w SAE 800 G w New type
Ordering Code Q67000-A8339 Q67000-A8340
Package P-DIP-8-4 P-DSO-8-1 (SMD)
Functional Description The SAE 800 is a single-tone, dual-tone or triple-tone gong IC designed for a very wide supply voltage range. If the oscillator is set to f0 = 13.2 kHz for example, the IC will issue in triple-tonemode the minor and major third e2 - C sharp - a, corresponding to 660 Hz - 550 Hz - 440 Hz, in dual-tone-mode the minor third e2 - C sharp, and in single-tone-mode the tone e2 (derived from the fundamental frequency f0 ; f1 = f0 / 20, f2 = f0 / 24, f3 = f0 / 30). When it is not triggered, the IC is in a standby state and only draws a few A. It comes in a compact P-DIP-8-1 or P-DSO-8-1 (SMD) package and only requires a few external components.
Semiconductor Group
1
09.94
SAE 800
SAE 800
SAE 800 G
Pin Configuration (top view) Pin Definitions and Functions Pin 1 2 3 4 5 6 7 8 Symbol GND Q Function Ground Output Supply Voltage Loudness Control Oscillator Resistor Oscillator Capacitor Trigger 2 (dual tone) Trigger 1 (single tone)
VS
L
ROSC COSC
E2 E1
Functional Description (cont'd) An RC combination is needed to generate the fundamental frequency (pin ROSC , COSC). The volume can be adjusted with another resistor (pin L). The loudspeaker must be connected directly between the output Q and the power supply VS . The current-sink principle combined with an integrated thermal shutdown (with hysteresis) makes the IC overload-protected and shortcircuit-protected. There are two trigger pins (E1, E2) for setting single-tone, dual-tone or triple-tone mode.
Semiconductor Group
2
SAE 800
Block Diagram Semiconductor Group 3
SAE 800
Circuit Description Trigger Positive pulses on inputs E1 and/or E2 trigger the IC. The hold feedback in the logic has a delay of several milliseconds. After this delay has elapsed, the tone sequence is started. This prevents parasitic spikes from producing any effect on the trigger pins. The following table shows the trigger options: E1 Triggered Grounded/open Triggered Oscillator This is a precision triangle oscillator with an external time constant (R x C). Capacitor CC on pin COSC is charged by constant current to 1 V and then discharged to 0.5 V. The constant current is obtained on pin ROSC with an external resistor RR to ground. When the voltage on COSC is building up, the logic is reset at 350 mV. This always ensures that a complete tone sequence is issued. If the oscillator pin is short-circuited to GND during operation, the sequence is repeated. E2 Triggered Triggered Grounded/open Mode Triple-tone Dual-tone Single-tone Issued Sequence Minor and major third Minor third 1st tone of minor third
The following applies: VC x CC = IC x T/2 with IC = VR/2RR = 1.2 V/2RR f0 = 5/8 x 1/(RR x CC) Voltages on Pin COSC
Semiconductor Group
4
SAE 800
Logic The logic unit contains the complete sequence control. The oscillator produces the power-on reset and the clock frequency. Single-tone, dual-tone or triple-tone operation is programmed on inputs E1 and E2. The 4-bit digital/analog converters are driven in parallel. In the event of oscillator disturbance, and after the sequence, the dominant stop output is set. By applying current to pin L, the sequence can be shortened by a factor of 30 for test purposes. The following figure shows the envelope of the triple-tone sequence:
Envelope of maximum amplitudes of three superimposed tones on Q (time scale for fOSC = 13.2 kHz) Ratio of maximum amplitudes M3 : M2 : M1 = 1 : 0.89 : 0.67
Envelope of the Triple-Tone Sequence
Semiconductor Group
5
SAE 800
Digital / Analog Converter, Loudness and Junction Control The DAC converts the 4-bit words from the logic into the appropriate staircase currents with the particular tone frequency. The sum current II drives the following current amplifier. The loudness generator produces the DAC reference current IL for all three tones. This requires connecting an external resistor to ground. The chip temperature is monitored by the junction control. At temperatures of more then approx. 170 C the stop input will switch the output current II to zero. The output current is enabled again once the chip has cooled down to approx. 150 C. Current Amplifier The current amplifier with a gain of 1600 boosts the current II from approx. 470 A maximum to approx. 750 mA maximum. The output stage consists of an NPN transistor with its emitter on power GND and collector on pin Q. The current control insures that the output stage only conducts defined currents. In conjunction with the integrated thermal shutdown, this makes the configuration shortcircuit-protected within wide limits. Because of the absence of feedback the circuit is also extremely stable and therefore uncritical in applications. Resistor RL on pin L sets the output voltage swing. This assumes that the resistive component of the loudspeaker impedance RQ responds similarly as the resistance RL. The output amplitude of the current II reaches the maximum IImax 3 x VL / RL at a time t of 2.33 s (only 3 tone mode), so RL has to be scaled for this point. The following applies:
IQ = IImax x B = (VS - Vsat) / RQ 0.8 VS / RQ
3 x B x (VL / RL) 0.8 VS / RQ the result is:
RL = RQ x 3 x B x (VL / 0.8 VS) RL = RQ x K x (VL / 0.8 VS)
with: B = 1600 with: K = 4800
Semiconductor Group
6
SAE 800
Application Hints and Application Circuit 1) Loudness Resistor (max. Load Current of 3-Tone Signal with Ensured Ratio of Amplitudes) 0.8 VS / RQ (VL / RL) x K
RL = (VL / 0.8 VS) x RQ x K; K = 4800
Example: RQ = 8 ; VS = 5 V; VL = 1.2 V
RL = (1.2 / 4) x 8 x 4800 12 k
2) Oscillator Elements RR , CC
f = 5 / 8 x 1 / (RR x CC)
Example: f = 13.2 kHz; CC = 4.7 nF
RR = 5 / (8 x 13.2 x 4.7) x 106 10 k
The following is a typical application circuit
Application Circuit
Semiconductor Group
7
SAE 800
Absolute Maximum Ratings Parameter Supply voltage Input voltage at E1, E2 Current at output Q Current at input pins E1, E2 Current at pin ROSC Current at pin L Current at pin COSC Junction temperature Storage temperature Operating Range Supply voltage Junction temperature Oscillator frequency at COSC Current at pin ROSC Current for test mode at pin L Current at pin L Input voltage at E1, E2 Thermal resistance junction-air (P-DIP-8-4) junction-air (P-DSO-8-1) Symbol min. Limit Values max. 24 24 750 3 200 200 200 150 150 V V mA mA A A A C C - 0.3 -5 - 50 -2 - 300 - 300 - 200 - 50 - 50 Unit
VS VE1, E2 IQ IE1, E2 IR IL IC Tj Tstg
VS Tj fC IR IR IL VE1, E2 Rth JA Rth JA
2.8 - 25 - 200 90 - 200 -4
18 125 100 - 10 110 - 10 18 100 180
V C kHz A A A V K/W K/W
Semiconductor Group
8
SAE 800
Characteristics Tj = - 25 to 125C; VS = 2.8 to 18 V Parameter Symbol min. Supply Section Standby current Quiescent current; pin L open Output Section Peak output power (tone 3) Limit Values typ. max. Unit Test Condition
ISt IQu
1 5
10 10
A mA
VS = 2.8 V; RQ = 4 ; RL = 8.2 k VS = 2.8 V; RQ = 8 ; RL = 18 k VS = 5.0 V; RQ = 8 ; RL = 10 k VS = 5.0 V; RQ = 16 ; RL = 18 k VS = 12 V; RQ = 50 ; RL = 33 k
Output level differences: tone 1 to 3 tone 2 to 3 Biasing Section Voltage at pin ROSC ; RR = 10 k Voltage at pin L; RL = 10 k Oscillator Section Amplitude Frequency RR = 10 k; CC = 4.7 nF Oscill. drift vs. temperature Oscill. drift vs. supply voltage Input Section Triggering voltage at E1, E2 Triggering current at E1, E2 Noise voltage immunity at E1, E2 Triggering delay at f0 = 13.2 kHz
1) 2)
PQ PQ PQ PQ PQ a13 a23
250 125 450 225 450 -1 -1
330 165 600 300 600 1 1
mW mW mW mW mW dB dB
A
A 1) A 2)
VR VL
1.2 1.2
V V
VC
f0 DT DV
-3
0.5 13.2 +3 1
V kHz 10-4/K 10-3/K
VE1 , E2 IE1 , E2 VE1 , E2 tdT
1.6 100 2 0.3 10
V A V ms
a13 = 20 x log (M1 / (0.67 x M3)) a23 = 20 x log (M2 / (0.89 x M3))
Semiconductor Group
9
SAE 800
Output Peak Voltage VQ versus Loudness-Current IL
Max. Output Power PQ versus Loudness-Current IL
Power Dissipation Pv of Output Stage versus Loudness-Current IL
Peak Current IQ versus Loudness-Current IL
*) Note that IQ = f (IL) varies between 0 and K IL during tone sequence. Thereby the maximum of the power dissipation during the tone sequence is the maximum of Pv (in diagram) between IL = 0 and chosen IL = VL/RL.
Semiconductor Group
10
SAE 800
Output Peak Voltage VQ versus Loudness-Current IL
Max. Output Power PQ versus Loudness-Current IL
Power Dissipation Pv of Output Stage versus Loudness-Current IL
Peak Current IQ versus Loudness-Current IL
*) Note that IQ = f (IL) varies between 0 and K IL during tone sequence. Thereby the maximum of the power dissipation during the tone sequence is the maximum of Pv (in diagram) between IL = 0 and chosen IL = VL/RL.
Semiconductor Group
11
SAE 800
Circuit for SAE 800 Application in Home Chime Installation Utilizing AC and DC Triggering for 1, 2 or 3 Tone Chime; Adjustable Volume PCB layout information: Because of the peak currents at VS , Q and GND the lines should be designed in a flatspread way or as star pattern.
Semiconductor Group
12
SAE 800
Circuit for SAE 800 Application in Home Chime Installation for Operation without Battery Semiconductor Group 13
SAE 800
Package Outlines Plastic-Package, P-DIP-8-4 (Plastic Dual In-Line Package)
Plastic-Package, P-DSO-8-1 (SMD) (Plastic Dual Small Outline)
SMD = Surface Mounted Device Semiconductor Group 14
Dimensions in mm
GPS05121
GPD05583

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